1. Field of the Invention
The present invention relates to a semiconductor device and a method of manufacturing the semiconductor device.
2. Related Art of the Invention
A semiconductor device in which a power semiconductor element is jointed to a lead frame on an insulator directly is known.
FIG. 11(A) shows a schematic sectional view showing a structure of a junction part between a power semiconductor element and a lead frame in such a conventional power semiconductor device.
A surface of one side of the lead frame 304 is fixed on an insulator 305 an undersurface of which is arranged with contact on a heat radiation plate 306. Another surface of the lead frame 304 is jointed to a power semiconductor element 301 through a solder layer 302.
Thus, the solder 302 has been conventionally used for junction of the power semiconductor element 301 and the lead frame 304. However, since a coefficient of linear expansion of the lead frame 304 and a coefficient of linear expansion of the power semiconductor element 301 are greatly different, large heat stress is repeatedly impressed to the solder layer 302 of the solder junction by a power cycle at the time of making the power semiconductor device drive, finally, a solder crack occurs and there is a problem of becoming poor junction.
On the other hand, in order to reduce a heat stress and a heat warp which occur by the difference of the coefficients of linear expansion between the members, a structure where a heat-conducting porous metal plate is arranged between the members with a large difference of the coefficients of linear expansion, and the heat-conducting porous metal plate and each of the members are jointed by the solder, is proposed (see for example Japanese Laid Open Patent Publication No. 2002-237556).
The inventor of the invention considers that the structure proposed in Japanese Laid Open Patent Publication No. 2002-237556 is applied to the solder junction of the conventional power semiconductor device of the structure shown in FIG. 11(A) in order to reduce the heat stress applied to the solder layer 302.
FIG. 11(B) shows a schematic sectional view showing a junction part between the power semiconductor element and the lead frame when the heat-conducting porous metal plate is arranged on the conventional power semiconductor device shown in FIG. 11(A).
The power semiconductor element 301 and the lead frame 304 which have a large difference of the coefficients of linear expansion are jointed to a heat-conducting porous metal plate 303 which is held between two solder layers 302a and 302b. 
The porous metal plate 303 comprises a heat-conducting metal such as copper or aluminum with a large thermal conductivity and a large coefficient of linear expansion.
The porous metal plate 303 reduces the heat stresses which are applied to the solder layers 302a and 302b as a stress buffering plate, and an occurrence of the solder crack can be suppressed.